VIA Technologies EPIA-PN Bedienungsanleitung

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User’s Manual
EPIA-NX
Version 1.01
September 3, 2007
Seitenansicht 0
1 2 3 4 5 6 ... 77 78

Inhaltsverzeichnis

Seite 1 - User’s Manual

User’s Manual EPIA-NX Version 1.01 September 3, 2007

Seite 2 - Trademarks

Run VGABIOS if S3 Resume...48 AC Loss Auto restart...

Seite 3 - FOR HOME OR OFFICE USE

EXIT WITHOUT SAVING...61 DRIVER INSTALLATION ...

Seite 4 - Safety Instructions

This page is intentionally left blank. viii

Seite 5

CHAPTER 1 Specifications The ultra-compact and highly integrated VIA EPIA-NX Nano-ITX mainboard is the smallest form-factor available today. Through

Seite 6 - ABLE OF

Chapter 1 MAINBOARD SPECIFICATIONS CPU • Supports VIA C7 1.5GHz NanoBGA2 Processor • Supports VIA Eden 1.2GHz NanoBGA2 Processor Chipset • VIA CX70

Seite 7

Specifications Onboard I/O Connectors • 1 x USB pin connector for 6 additional USB 2.0 ports • 1 x LPC header • 1 x PS2 mouse/keyboard header • 2

Seite 8

Chapter 1 MAINBOARD LAYOUT BACK PANEL LAYOUT 4

Seite 9

CHAPTER 2 Installation This chapter provides you with information about hardware installation procedures. It is recommended to use a grounded wrist

Seite 10

Chapter 2 CPU The VIA EPIA-NX Nano-ITX mainboard can support VIA C7 NanoBGA2 and VIA Eden NanoBGA2 processors. The processor requires a heatsink with

Seite 11

Installation MEMORY MODULE INSTALLATION Memory Slot: DDR2_SODIMM The VIA EPIA-NX Nano-ITX mainboard provides one SODIMM slot for DDR2 533 SDRAM memory

Seite 12

Copyright Copyright © 2006-2007 VIA Technologies Incorporated. All rights reserved. No part of this document may be reproduced, transmitted, transcri

Seite 13 - Specifications

Chapter 2 CONNECTING THE POWER SUPPLY The VIA EPIA-NX Nano-ITX mainboard supports a Nano-ITX power supply for the power system. Before inserting the

Seite 14 - PECIFICATIONS

Installation BACK PANEL PORTS The back panel has the following layout: RJ45 LAN Port The mainboard provides a standard RJ45 port for enabling connec

Seite 15

Chapter 2 CONNECTORS IDE Connector: IDE The mainboard has an Ultra DMA 133/100 controller. You can connect up to two IDE devices in any combination.

Seite 16

Installation Case Connector: FPNL The FPNL pin header allows you to connect the power switch, reset switch, power LED, HDD LED and the case speaker.

Seite 17 - Installation

Chapter 2 Audio Connector: AUDIO This is an interface for connections to external audio devices. Pin Signal Pin Signal 1 SPDIF_OUT 2 +5V 3 GND 4

Seite 18 - Chapter 2

Installation LVDS Panel Connector: PANEL The LVDS Panel connector allows you to connect the panel’s LVDS cable directly to support LVDS panel without

Seite 19 - NSTALLATION

Chapter 2 Secondary LVDS Connector: LVDS (Special BIOS needs to be reques-ted through FAE to enable this function) The Secondary LVDS connector allow

Seite 20 - ONNECTING THE

Installation Serial ATA Connectors: SATA1 and SATA2 These next generation connectors support the thin Serial ATA cables for primary internal storage

Seite 21 - RJ45 LAN Port

Chapter 2 CRT, Video Capture and SMBus Connector The mainboard provides a single connector for the CRT, Video Capture and SMBus interfaces. Pin Signal

Seite 22 - IDE Connector: IDE

Installation JUMPERS The mainboard provides jumpers for setting some mainboard functions. This section will explain how to change the settings of the

Seite 23

FCC-B Radio Frequency Interference Statement This equipment has been tested and found to comply with the limits for a class B digital device, pursuant

Seite 24

Chapter 2 Panel Power Selector: PVDD_SEL PVDD_SEL125643+3.3VPVDD_SEL125643+5VPVDD_SEL125643+12VPVDD is the VCC selector jumper to determine the panel

Seite 25 - Inverter Connector

Installation SLOTS Mini Peripheral Component Interconnect: MINIPCI The miniPCI slot allows you to insert a miniPCI expansion card. First unplug the

Seite 26

Chapter 2 This page is intentionally left blank. 20

Seite 27 - USB Pin Connector: USB

CHAPTER 3 BIOS Setup This chapter gives a detailed explanation of the BIOS setup functions. 21

Seite 28 - TV-out Connector

Chapter 3 ENTERING SETUP Power on the computer and press <Delete> during the beginning of the boot sequence to enter the BIOS setup menu. If yo

Seite 29

BIOS Setup CONTROL KEYS Keys Description Up Arrow Move to the previous item Down Arrow Move to the next item Left Arrow Move to the item in the lef

Seite 30

Chapter 3 NAVIGATING THE BIOS MENUS The main menu displays all the BIOS setup categories. Use the Up/Down/ Left/Right arrow keys to select any item o

Seite 31

BIOS Setup GETTING HELP The BIOS setup program provides a “General Help” screen. You can display this screen from any menu/sub-menu by pressing <F

Seite 32

Chapter 3 MAIN MENU : Select ItemF9 : Menu in BIOSF10 : Save & Exit SetupEsc : QuitTime, Date, Hard Disk Type...Standard CMOS FeaturesAdvanced Ch

Seite 33 - BIOS Setup

BIOS Setup Load Fail-Safe Defaults Use this menu option to load the BIOS default settings for minimal and stable system operations. Load Optimized Def

Seite 34 - NTERING

Safety Instructions 1. Always read the safety instructions carefully. 2. Keep this User's Manual for future reference. 3. Keep this equipment

Seite 35 - Keys Description

Chapter 3 STANDARD CMOS FEATURES Jul: MoveF5: Previous Values F6: Fail-Safe Defaults F7: Optimized DefaultsEnter: Select +/-/PU/PD: Value F10: Save E

Seite 36 - AVIGATING THE

BIOS Setup IDE DRIVES : MoveF5: Previous Values F6: Fail-Safe Defaults F7: Optimized DefaultsEnter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: G

Seite 37

Chapter 3 ADVANCED BIOS FEATURES : MoveF5: Previous Values F6: Fail-Safe Defaults F7: Optimized DefaultsEnter: Select +/-/PU/PD: Value F10: Save ESC:

Seite 38 - Chapter 3

BIOS Setup First/Second/Third Boot Device Set the boot device sequence as BIOS attempts to load the disk operating system. Setting Description LS120

Seite 39

Chapter 3 Typematic Rate (Chars/Sec) This item sets the rate (characters/second) at which the system retrieves a signal from a depressed key. Settings

Seite 40 - TANDARD

BIOS Setup Full Screen Logo Show Show full screen logo during BIOS boot up process. Settings: [Enabled, Disabled] Summary Screen Show Show summary scr

Seite 41

Chapter 3 CPU FEATURE : MoveF5: Previous Values F6: Fail-Safe Defaults F7: Optimized DefaultsEnter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: G

Seite 42 - Quick Power On Self-Test

BIOS Setup TM2 Bus VID This item sets the voltage of the throttled performance that will be initiated when the on die sensor goes from not hot to hot.

Seite 43 - Typematic Rate Setting

Chapter 3 HARD DISK BOOT PRIORITY : MoveF5: Previous Values F6: Fail-Safe Defaults F7: Optimized DefaultsPU/PD/+/-:Change Priority F10: SaveESC: Exit

Seite 44

BIOS Setup ADVANCED CHIPSET FEATURES : MoveF5: Previous Values F6: Fail-Safe Defaults F7: Optimized DefaultsEnter: Select +/-/PU/PD: Value F10: Save

Seite 45 - Summary Screen Show

BOX CONTENTS One VIA Nano-ITX mainboard One Quick Installation Guide One ATA-133/100 IDE ribbon cable One PS2 KB/MS cable One VGA cable O

Seite 46 - TM2 Bus Ratio

Chapter 3 Select Display Device This setting refers to the type of display being used with the system. Settings: [CRT, LCD, CRT+LCD, TV, LCD+TV] Panel

Seite 47 - Execute Disable Bit

BIOS Setup AGP & P2P BRIDGE CONTROL : MoveF5: Previous Values F6: Fail-Safe Defaults F7: Optimized DefaultsEnter: Select +/-/PU/PD: Value F10: Sa

Seite 48

Chapter 3 AGP Driving Control This item is used to signal driving current on AGP cards to auto or manual. Settings: [Auto, Manual] AGP Fast Write This

Seite 49 - DVANCED

BIOS Setup CPU & PCI BUS CONTROL : MoveF5: Previous Values F6: Fail-Safe Defaults F7: Optimized DefaultsEnter: Select +/-/PU/PD: Value F10: Save

Seite 50 - TV Type

Chapter 3 TV OUTPUT CONNECTOR : MoveF5: Previous Values F6: Fail-Safe Defaults F7: Optimized DefaultsEnter: Select +/-/PU/PD: Value F10: Save ESC: Ex

Seite 51 - AGP 2.0 Mode

BIOS Setup INTEGRATED PERIPHERALS : MoveF5: Previous Values F6: Fail-Safe Defaults F7: Optimized DefaultsEnter: Select +/-/PU/PD: Value F10: Save ESC

Seite 52

Chapter 3 VIA ONCHIP PCI DEVICE : MoveF5: Previous Values F6: Fail-Safe Defaults F7: Optimized DefaultsEnter: Select +/-/PU/PD: Value F10: Save ESC:

Seite 53 - DRDY_Timing

BIOS Setup USB DEVICE SETTING : MoveF5: Previous Values F6: Fail-Safe Defaults F7: Optimized DefaultsEnter: Select +/-/PU/PD: Value F10: Save ESC: Ex

Seite 54 - ONNECTOR

Chapter 3 USB Keyboard Function Enable or disable Legacy support of USB Keyboard Settings: [Enabled, Disabled] USB Storage Function Enable or disable

Seite 55 - ERIPHERALS

BIOS Setup POWER MANAGEMENT SETUP : MoveF5: Previous Values F6: Fail-Safe Defaults F7: Optimized DefaultsEnter: Select +/-/PU/PD: Value F10: Save ESC

Seite 56 - OnBoard LAN Boot ROM

TABLE OF CONTENTS SPECIFICATIONS ...1 MAINBOARD SPECIFICATIONS...

Seite 57 - USB Operation Mode

Chapter 3 Video Off Option Select whether or not to turn off the screen when system enters power saving mode, ACPI OS such as Windows XP will override

Seite 58 - No Device

BIOS Setup WAKEUP EVENT DETECT : MoveF5: Previous Values F6: Fail-Safe Defaults F7: Optimized DefaultsEnter: Select +/-/PU/PD: Value F10: Save ESC: E

Seite 59 - ANAGEMENT

Chapter 3 PS2 Keyboard Power On Settings: [Disabled, Enabled] PS2 Mouse Power On Settings: [Disabled, Enabled] PowerOn by PCI Card Enables activity de

Seite 60

BIOS Setup PNP/PCI CONFIGURATIONS : MoveF5: Previous Values F6: Fail-Safe Defaults F7: Optimized DefaultsEnter: Select +/-/PU/PD: Value F10: Save ESC

Seite 61 - PS2MS Wakeup Key Select

Chapter 3 Resource Controlled By Enables the BIOS to automatically configure all the Plug-and-Play compatible devices. Setting Description Auto(ESCD)

Seite 62

BIOS Setup FREQUENCY / VOLTAGE CONTROL : MoveF5: Previous Values F6: Fail-Safe Defaults F7: Optimized DefaultsEnter: Select +/-/PU/PD: Value F10: Sav

Seite 63 - Reset Configuration Data

Chapter 3 DRAM CLOCK/DRIVE CONTROL : MoveF5: Previous Values F6: Fail-Safe Defaults F7: Optimized DefaultsEnter: Select +/-/PU/PD: Value F10: Save ES

Seite 64 - Maximum Payload Size

BIOS Setup Read to Precharge (Trtp) Settings: [2T, 3T] Write to Read CMD (Trtp) Settings: [1T/2T, 2T/3T] Write Recovery Time (Twr) Settings: [2T, 3T,

Seite 65 - Spread Spectrum

Chapter 3 LOAD FAIL-SAFE DEFAULTS : Select ItemF9 : Menu in BIOSF10 : Save & Exit SetupEsc : QuitLoad Fail-Safe DefaultsStandard CMOS FeaturesAdv

Seite 66 - DRAM Timing

BIOS Setup LOAD OPTIMIZED DEFAULTS : Select ItemF9 : Menu in BIOSF10 : Save & Exit SetupEsc : QuitLoad Optimized DefaultsLoad Fail-Safe DefaultsS

Seite 67 - RDSAIT mode

JUMPERS...17 Clear CMOS: CLEAR_CMOS...

Seite 68

Chapter 3 SET SUPERVISOR / USER PASSWORD : Select ItemF9 : Menu in BIOSF10 : Save & Exit SetupEsc : QuitChange / Set / Disable PasswordExit Witho

Seite 69 - PTIMIZED

BIOS Setup Additionally, when a password is enabled, the BIOS can be set to request the password each time the system is booted. This would prevent u

Seite 70 - UPERVISOR

Chapter 3 SAVE & EXIT SETUP : Select ItemF9 : Menu in BIOSF10 : Save & Exit SetupEsc : QuitSave Data to CMOSLoad Optimized DefaultsLoad Fail-

Seite 71

BIOS Setup EXIT WITHOUT SAVING : Select ItemF9 : Menu in BIOSF10 : Save & Exit SetupEsc : QuitAbandon all DataLoad Optimized DefaultsLoad Fail-Sa

Seite 72

Chapter 3 This page is intentionally left blank. 62

Seite 73

CHAPTER 4 Driver Installation This chapter gives you brief descriptions of each mainboard driver and application. You must install the VIA chipset d

Seite 74

Chapter 4 DRIVER UTILITIES Getting Started The mainboard includes a Driver Utilities CD that contains the driver utilities and software for enhancing

Seite 75 - Driver Installation

Driver Installation Running the Driver Utilities CD To start using the CD, insert the CD into the CD-ROM or DVD-ROM drive. The CD should run automati

Seite 76 - Getting Started

Chapter 4 CD CONTENT VIA 4in1 Drivers: Contains VIA ATAPI Vendor Support Driver (enables the performance enhancing bus mastering functions on ATA-ca

Seite 77

First/Second/Third Boot Device.....31 Boot Other Device....

Seite 78 - Chapter 4

AGP Master 1 WS Read................40 AGP 3.0 Calibration Cycle .........

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