VIA Technologies EPIA-PN Bedienungsanleitung PDF herunterladen (Seite 31)

UART port 2: J1

UART offers TTL level serial signal for the user to easily convert to

support RS232/RS422/RS485.

(Pin 1) Default: 5V

Pin UART Signal

1 +5V

2 SIN_1

3 SOUT_1

4 DCD_1

5 RI_1

6 GND

7 DTR_1

8 CTS_1

9 RTS_1

10 DSR_1

1 2 ... 26 27 28 29 30 31 32 33 34 35 36 ... 78 79

EPIA-P820 1
Copyright and Trademarks 2
Disclaimer 2
Regulatory Compliance 3
Safety Precautions 4
Box Contents 5
ABLE OF 6
Product Overview 12
KEY COMPONENTS 13
MAINBOARD SPECIFICATIONS 14
EPIA-P820 LAYOUT 15
P820-A I/O MODULE LAYOUT 17
DEVELOPMENT KIT ACCESSORIES 18
Onboard 20
Connectors, Slots 20
TOP SIDE CONNECTORS 21
DC-In Power connector: PWR1 22
Pin Signal 22
Signal Pin 24
UART port 2: J1 31
Pin UART Signal 31
BOTTOM SIDE CONNECTOR 32
External Battery: BAT1 34
Memory Module Installation 35
Slot Module Size Total 35
Installing the memory 36
PIN HEADER AND CONNECTOR 37
VENDOR LISTS 37
Onboard Jumpers 38
Clear CMOS jumper: JM1 39
Setting 1 2 3 39
P820-A I/O 42
Module Installation 42
INSTALLATION PROCEDURE 43
BIOS Setup 46
ENTERING THE BIOS SETUP MENU 47
CONTROL KEYS 47
GETTING HELP 48
MAIN MENU 49
ADVANCED SETTINGS 50
CPU CONFIGURATION 51
IDE CONFIGURATION 52
IDE DRIVES 53
PIO Mode 54
DMA Mode 54
S.M.A.R.T 54
32Bit Data Transfer 54
ACPI SETTINGS 55
GENERAL ACPI CONFIGURATION 56
ADVANCED ACPI CONFIGURATION 57
CHIPSET ACPI CONFIGURATION 58
APM CONFIGURATION 59
PREAD SPECTRUM CONFIGURATION 62
USB CONFIGURATION 63
ADVANCED PCI/PNP SETTINGS 64
PCI IDE BusMaster 65
Off Board PCI/ISA IDE Card 65
IRQ3~15 65
DMA Channel 0~7 65
Reserved Memory Size 65
BOOT SETTINGS 66
BOOT SETTINGS CONFIGURATION 67
Interrupt 19 Capture 68
BOOT DEVICE PRIORITY 69
SECURITY SETTINGS 70
ADVANCED CHIPSET SETTINGS 71
NORTH BRIDGE VIA VX855 72
CONFIGURATION 72
ONCHIP VGA CONFIGURATION 73
SOUTH BRIDGE VIA VX855 74
PCI Delay Transaction 75
WATCH-DOG 75
EXIT OPTIONS 76
Driver Installation 78
MICROSOFT DRIVER SUPPORT 79
LINUX DRIVER SUPPORT 79

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